Integrated circuit design and fabrication is a vastly complex effort and involves interaction between numerous steps in a manufacturing process. While going through the various steps in the design process, an understanding is required of the limitations of the manufacturing process. Shapes must be designed which can be fabricated so that the desired electronic circuit function is implemented at the resulting end of fabrication. Frequently, millions and even hundreds of millions of transistors can exist on a single semiconductor chip. Each transistor is composed of shapes for diffusion, polysilicon, contacts, metallization, and other structures. The ability to design chips with such large numbers of essential transistors can be quite challenging and optimization of the circuitry as needed can be a daunting task even with the help of electronic design automation (EDA) software tools.
There are numerous metal lines of miniscule dimension in close proximity to one another on each semiconductor chip. Further, there are diffusions, polysilicon shapes, and insulator layers, all of which must be fabricated to exacting tolerances. As technologies have advanced, smaller and smaller dimensions are used in lithography. These small dimensions can lead to challenges with rounded shapes as well as bridging and necking, all of which are problematic for solid and robust design implementation. Various solutions have been developed over the years for fabricating circuits with greater density including the implementation of dog bone shapes and other methods to cause the final resulting circuitry to be correct. As the various methods advanced many became collectively known as optical proximity correction. With further shrinkage in design dimensions, fabrication has required double pattern lithography where a single layer is fabricated using two separate masks.